Micron’s Signal Integrity Research and Development (SI R&D) group supports all current and future product development, including DRAM, LPDRAM, NAND, NOR, 3DX P , DIMM modules and SSDs within the consumer, server, mobile, networking, graphics, automobile and embedded businesses. The SI R&D works on analysis of end to end systems solutions including but not limited to circuit level, integrated circuit (IC) packages, printed circuit boards (PCBs) and measurements to ensure good Signal Integrity (SI) and power integrity (PI) performance for Micron’s memory solutions. The team owns all steps of the signal and power integrity support process including die and package model generation, product performance analysis, system-level SI evaluation, measurement, correlation, and customer support. The team also supports future specification development within several industry standards groups including but not limited to JEDEC, ONFI, and IBIS. The group working environment is technically challenging, team-oriented, collaborative and customer-centric.

Within the larger SI R&D group , as a Principal Signal Integrity Engineer at Micron, you will be responsible for

L eading the design and analysis of high speed (HS) memory interfaces and power distribution networks (PDN).

L eading out in SI/PI development across a broad range of Micron’s portfolio to ensure product electrical performance through modeling, simulation, analysis, and correlation to measurement for the various products .

R epresenting the SI R&D team in technical cross functional collaborative groups, and integrating with package design, silicon design, product engineering, and marketing departments to ensure overall product performance.

Driving and development of SI/PI aspects of future standards ( including but not limited to JEDEC, ONFI, and IBIS ) through system and product electrical capability exploration.

Supporting external customer as needed

Developing methodologies and processes for SI/PI analysis

Supporting ( and in some cases d riving ) path-finding activities for IO and channel innovation to enabl e next generation of memory technologies at higher speeds and densities

Qualifications

Successful candidates for this position will have:

• PhD or MSEE w/15 years of industry experience

• Strong SI/PI/EMI theory and application , modeling, analysis, simulation

• Signal and Power Integrity Background, particularly in areas that affect I/O circuit and signaling performance.

• Required courses covering electromagnetic, transmission line and RF theory, analog design or similar fields of study or experience.

• E xperience with, and intermediate working knowledge of E.M. field solvers (quasi-static and full wave), time and frequency domain simulation tools like Q3D, SIWAVE, HFSS, HSPICE, ADS, etc..

• Deep understanding of electromagnetic and transmission line theory, general I/O design, signal integrity, differential and single-ended interface technologies.

• Deep understanding of timing budgets and jitter analysis

• Exper t ise in Printed Circuit Board (PCB) layout or electrical package design techniques.

• Experience in design and analysis of high-speed single-ended or differential buses

• Familiarity with, and fundamental understanding of lab measurement equipment like Oscilloscopes, TDR, Vector Network Analyzer (VNA), etc.

• Familiarity with statistical analysis (DOE) and equivalent tools (example: JMP) is also beneficial

• Desirable Mixed-signal Circuit Design Background

• Desirable Memory industry experience

• Ambitious candidate should enjoy leading and taking ownership of assigned projects, exhibit good written and verbal interpersonal skills, and have the ability to work well in a team with varied strengths.
  

Successful candidates for this position will be:

• Pro-active – Candidate will be expected to identify gaps and opportunities and address them with minimal supervision.

• Visionary – Candidate will be expected to think “outside-the-box” and yet offer innovative solutions within a set of practical constraints.

• Communicator – Candidate should be able to clearly convey necessary details of complex issues and corresponding solutions in both written and verbal formats.